The invention relates to a circuit configuration with an internally generated supply voltage that is derived from an externally applied supply voltage and drives current paths.
In modern integrated circuits, switching stages are supplied internally with supply voltages lower than externally applied supplies. As a result, the transistors can be dimensioned for a lower supply voltage and hence smaller. The internal supply voltage is generated by a voltage generator on the chip of the integrated circuit, which is supplied by the external supply voltage. Such supply voltage concepts are employed in particular in DRAMs, where at the present time the external supply voltage is 2.5 V, for example, and the internal supply voltage is 2.0 V.
Switching stages in the integrated circuit that are supplied by the internal supply voltage can be embodied as so-called dynamic logic. Such switching stages contain a current path including two transistors of the same channel type, for example n-channel MOS transistors, whose drain-source paths are connected in series between the terminal for the internal supply voltage and reference-ground potential (ground). One of the transistors is driven by a precharge signal which charges the output of the switching stage to the supply potential. In a subsequent operating clock cycle, a logic signal specifying the logic state to be transmitted is applied to the other of the transistors of the current path, which then leaves the output at supply potential or pulls it to ground.
The circuits that generate the precharge signal and the logic signal are likewise fed by the internal supply voltage. During the run-up of the voltage generator that generates the internal supply voltage, the problem exists that the logic levels for the precharge or logic signal are not defined and are established randomly. Thus, the case may occur in which both transistors of the current path of the dynamic switching stage are turned on completely or partly. There is then a conductive current path between the terminal for the internal supply voltage and the reference-ground potential. As a result, the voltage generator for the internal supply voltage is overloaded and may fail, so that the operating level for the internal supply voltage is not reached. Under certain circumstances, the voltage generator may be destroyed. The voltage generator would then have to be dimensioned for sufficiently high operating currents, that is to say larger than is actually necessary in normal operation. This results in a disproportionately high space requirement in the integrated circuit.
Published, Non-Prosecuted German Patent Application DE 198 29 287 A1 teaches a synchronous dynamic semiconductor memory having an initialization circuit that controls the switch-on operation. After stabilization of the supply voltage and processing of an initialization sequence, the SDRAM is prepared for normal operation. During the switch-on operation, care must be taken to ensure that the internal control circuits provided for proper operation are reliably kept in a defined desired state. Undesirable activation of output transistors, which, on the data lines, might bring about a short circuit or uncontrolled activation of internal current loads, is thereby prevented.
It is accordingly an object of the invention to provide a circuit configuration with an internal supply voltage that overcomes the above-mentioned disadvantages of the prior art devices of this general type, which operates with greater operational reliability in conjunction with a small area occupation in the case of integrated fabrication.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit configuration. The circuit contains a terminal for receiving an external supply voltage and a voltage generator connected to the terminal and receives the external supply voltage. The voltage generator generates an internal supply voltage deviating from the external supply voltage and has a terminal for tapping off the internal supply voltage. A reference-ground potential terminal for a reference-ground potential is connected to the voltage generator. A switching stage is provided and receives the internal supply voltage and contains at least two transistors being of a same conductivity type. The two transistors have controlled current paths connected in series and define a coupling node at a connection point of the controlled current paths. A first transistor of the two transistors receives and is controlled by a logic control signal and a second transistor of the two transistors receives and is controlled by a precharge signal. A control circuit for generating the precharge signal is provided and is connected to the switching stage. The control circuit contains control transistors each having a control terminal and including a first control transistor and a second control transistor having a conductivity type opposite the first control transistor. The first control transistor is connected to the terminal of the voltage generator for receiving the internal supply voltage. The second control transistor is connected to the reference ground potential terminal. A first inverter is provided and has an input receiving and controlled by a further precharge signal and, supply voltage terminals connected to one of the first control transistor and the second control transistor. The first and second control transistors are driven in a complementary manner by a control signal indicating a state of the internal supply voltage. In addition, the first inverter has an output. A second inverter is provided and has an input connected to the output of the first inverter and an output terminal providing the precharge signal.
In the circuit configuration according to the invention, circuit nodes of the switching stages supplied by the internal supply voltage are initialized. Therefore, in the presence of an internal supply voltage that is not yet high enough for correct operation, the critical circuit nodes are driven in such a way that a conductive current path between the internal supply voltage and the reference-ground potential is reliably avoided. The control circuit ensures that the precharge signal, during the initialization phase, always has a logic level such that the precharge transistor is reliably turned off. In n-channel MOS precharge transistors, the precharge signal always has a low level during the initialization phase. Only after the availability of a sufficiently high internal supply voltage is the precharge signal enabled and can be controlled cyclically in accordance with the desired signal processing.
The output-side inverter of the control circuit can advantageously be clamped to the external supply voltage by a third transistor during the initialization phase. This ensures that the output of the inverter reliably assumes a level such that the precharge transistor of the switching stage is switched off. The inverter is expediently driven by the internal supply voltage, so that only as few functional elements as possible are supplied by the external supply voltage.
The precharge signal provided on the input side is blocked by the first inverter and first and second transistors which connect the inverter, on the supply voltage side, to the internal supply voltage or the reference-ground potential, until a sufficiently high internal supply voltage is available. This state is indicated by a corresponding control signal. The control signal is applied in a complementary manner to the transistors that connect the first inverter to the internal supply voltage or the reference-ground potential. The control signal is fed directly, in non-inverted form, to one of the transistors; the control signal is fed in inverted form, via an inverter, to the other of the transistors. The inverter can expediently be supplied with an operating voltage by the external supply voltage.
The invention is advantageous particularly when the switching stage to be initialized is disposed in an output driver of the circuit. The output terminal of the output driver is then connected to a pad. This is a relatively large metallization area on which a bonding wire is stamped, the bonding wire being connected to a terminal pin of a housing. The output driver has transistors of relatively large dimensions with a high current driver capability, with the result that external lines connected to the terminal pin of the housing, the lines running on a circuit board for example, can be driven. If such a current path formed a conductive connection between the internal supply voltage and the reference-ground potential in an impermissible manner during the start-up of the voltage generator providing the internal supply voltage, a relatively high shunt current could flow. By virtue of the invention, in the case of an output driver, such an impermissible state is avoided by the intialization described above.
The control signal that indicates a sufficiently high internal supply voltage is available may be a logic signal that compares the internally generated supply voltage with a threshold value. As an alternative, the control signal can be derived directly by level conversion from the internally generated supply voltage. A level converter is supplied by the external supply voltage and converts the instantaneous level of the internal supply voltage to a logic level referred to the external supply voltage.
In accordance with an added feature of the invention, the control circuit has a third transistor with a controlled path connected between the input of the second inverter and the terminal for the external supply voltage. The third transistor receives and is driven by the control signal indicating the state of internal supply voltage.
In accordance with an additional feature of the invention, the second inverter is connected to the terminal for the internal supply voltage.
In accordance with another feature of the invention, the control signal indicating the state of the internal supply voltage is applied to the control terminal of the second control transistor. A third inverter is provided and is connected to the control terminal of the first control transistor and receives the control signal indicating the state of the internal supply voltage. The third inverter outputs an inverted control signal received by the control terminal of the first control transistor, and the third inverter is connected to the terminal for the external supply voltage.
In accordance with a further feature of the invention, a pad is provided, and the switching stage forms an output driver of an integrated circuit and has an output connected to the pad where a signal can be tapped off from the integrated circuit.
In accordance with a further added feature of the invention, the switching stage has a third transistor with a controlled path connected between the coupling node and the pad. The third transistor receives and is controlled by a further control signal.
In accordance with a further additional feature of the invention, the internal supply voltage, with reference to the reference-ground potential, has a smaller magnitude than the external supply voltage.
In accordance with a concomitant feature of the invention, a level converter having an output connected to the control circuit is provided. The level converter generates the control signal indicating the state of the internal supply voltage and can be tapped off at the output of the level converter. The level converter is connected to the terminal for the external supply voltage and has a signal input receiving and driven by the internal supply voltage.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a circuit configuration with an internal supply voltage, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.